This is a custom T35 FPGA project module for S100Computers.
This module was designed to augment the EP4CE10 based FPGA originally in use on the various FPGA S-100 Boards in the S100Computers inventory.
Visit the T35 FPGA Module GitHub Page.
Follow the Contact Link for current availability.
The module pictured below is in the same basic footprint as the original, but with added pins (shown in white-filled rectangles surrounding the new pins).
Added features in comparison to the original EP4CE10 module include:
- 50 Additional GPIO Pins for a total of 214 I/Os (Module is shipped with pins unmounted for added flexibility)
- 3x the Logic Elements (31,680 vs 10,320)
- 3.5x the Embedded FPGA RAM (180K vs 51K)
- Adds in LVDS Capability (up to 800Mbps)
- Adds 128MByte DDR3 SDRAM
- Up to four configuration images (jumper selectable)
- Seven Segment LED Display for custom status or diagnostic output
Visit the T35 FPGA Module GitHub Page.
T35 Module Efinity (FPGA Code) Projects
T35 ROMWBW Build for S100Computers FPGA Z80 SBC
Visit the T35 Z80 Firmware for ROMWBW
This repository hosts the files required to build firmware for the S100 Computers Z80 FPGA SBC with a T35 Module. The resulting firmware can be used to load RomWBW from a disk image via CF Card or SD Card.
T35 FPGA Module Test Projects
T35seg7
This is a test project for the S100Computers T35 FPGA Module.
It is intended as a proof-of-life test for the module that does not impact existing designs that do not use the expansion pins 72-81 (which is currently all S100Computers FPGA designs), as only the Seven Segment LED is driven (all other pins are tri-state.
Visit the T35seg7 GitHub here.
T35 GPIO Test
This FPGA Project is used for testing the GPIO pins of the T35 FPGA Module
DO NOT USE THIS PROJECT ON EXISTING HOST BOARDS!!!
This project drives ALL pins as outputs so conflicts will occur if used on a board that drives the T35 Module pins.
Visit the T35 GPIO Test here.
T35 Address Lines Tests for the S100 Computers FPGA Z80 SBC
The following projects use the T35 to test the FPGA Z80 SBC’s S-100 Bus Address lines.